{"id":1178,"date":"2026-06-19T16:39:13","date_gmt":"2026-06-19T16:39:13","guid":{"rendered":"https:\/\/convly.ai\/huawei-ascend-950-pangu-explained-2026\/"},"modified":"2026-06-19T16:39:34","modified_gmt":"2026-06-19T16:39:34","slug":"huawei-ascend-950-pangu-explained-2026","status":"publish","type":"post","link":"https:\/\/convly.ai\/fr\/huawei-ascend-950-pangu-explained-2026\/","title":{"rendered":"Huawei Ascend 950 &#038; Pangu: China&#8217;s 2026 AI-Chip Play"},"content":{"rendered":"<p>Huawei spent the past nine months turning its AI silicon plans into a calendar. At Huawei Connect last September it published a four-chip Ascend roadmap; at the Huawei Cloud INSPIRE Creators Conference this June it put a near-term date on the most important part of it. The Ascend 950DT, the training-and-decode member of the 950 family, lands on Huawei Cloud in August 2026 with a full commercial launch in Q4. Company VP Chen Lin summed up the cadence as &#8220;one generation per year, doubling the computing power.&#8221;<\/p>\n<p>That is the pitch. This piece is about how much of it is real. We will walk through the chip roadmap and its actual specs, the openPangu models trained on Ascend, the year-end open-source push around CANN and the Mind toolchain, and the constraints nobody at the keynote dwelled on: a 7nm ceiling at SMIC, a homegrown HBM supply that cannot keep up, and a per-chip gap to NVIDIA that the roadmap quietly admits.<\/p>\n<div class=\"convly-tldr\">\n<h3>Principaux enseignements<\/h3>\n<ul>\n<li><strong>One chip a year, each ~2x the last.<\/strong> Ascend 950PR (Q1 2026), 950DT (cloud Aug 2026, commercial Q4 2026), 960 (Q4 2027), 970 (Q4 2028), building toward a system-level 4 FP4 zettaflops by 2028.<\/li>\n<li><strong>The 950 is a parity-with-Hopper part, not a Blackwell killer.<\/strong> Per chip it lands around 1 PFLOPS FP8 \/ 2 PFLOPS FP4 with 128\u2013144 GB of Huawei&#8217;s own HBM \u2014 strong, but a fraction of a single NVIDIA Rubin GPU.<\/li>\n<li><strong>Huawei&#8217;s real weapon is scale.<\/strong> The Atlas 950 SuperPoD wires 8,192 chips together and claims to beat NVIDIA&#8217;s NVL144 on aggregate compute, memory, and bandwidth by brute force.<\/li>\n<li><strong>openPangu 2.0 went open at HDC 2026.<\/strong> A 505B-parameter Pro model (18B active) and a 92B Flash model (6B active), both 512K context, with seven components opening from June 30.<\/li>\n<li><strong>The honest constraint is manufacturing.<\/strong> SMIC is stuck at 7nm and homegrown HBM is the bottleneck; in the most Huawei-favorable analyst scenario it still reaches only about 5% of NVIDIA&#8217;s aggregate AI compute in 2026, and the median estimate is far lower.<\/li>\n<li><strong>Even Huawei&#8217;s own roadmap shows a 2026 regression.<\/strong> The 950PR\/950DT have lower total processing performance than 2025&#8217;s Ascend 910C; by Huawei&#8217;s own plan the first chip to beat an H200 is the 960 in Q4 2027.<\/li>\n<\/ul>\n<\/div>\n<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_84 counter-flat ez-toc-counter ez-toc-container-direction\">\n<label for=\"ez-toc-cssicon-toggle-item-6a35fd3cef652\" class=\"ez-toc-cssicon-toggle-label\"><span class=\"\"><span class=\"eztoc-hide\" style=\"display:none;\">Toggle<\/span><span class=\"ez-toc-icon-toggle-span\"><svg style=\"fill: #000000;color:#000000\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" class=\"list-377408\" width=\"20px\" height=\"20px\" viewbox=\"0 0 24 24\" fill=\"none\"><path d=\"M6 6H4v2h2V6zm14 0H8v2h12V6zM4 11h2v2H4v-2zm16 0H8v2h12v-2zM4 16h2v2H4v-2zm16 0H8v2h12v-2z\" fill=\"currentColor\"><\/path><\/svg><svg style=\"fill: #000000;color:#000000\" class=\"arrow-unsorted-368013\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" width=\"10px\" height=\"10px\" viewbox=\"0 0 24 24\" version=\"1.2\" baseprofile=\"tiny\"><path d=\"M18.2 9.3l-6.2-6.3-6.2 6.3c-.2.2-.3.4-.3.7s.1.5.3.7c.2.2.4.3.7.3h11c.3 0 .5-.1.7-.3.2-.2.3-.5.3-.7s-.1-.5-.3-.7zM5.8 14.7l6.2 6.3 6.2-6.3c.2-.2.3-.5.3-.7s-.1-.5-.3-.7c-.2-.2-.4-.3-.7-.3h-11c-.3 0-.5.1-.7.3-.2.2-.3.5-.3.7s.1.5.3.7z\"\/><\/svg><\/span><\/span><\/label><input type=\"checkbox\"  id=\"ez-toc-cssicon-toggle-item-6a35fd3cef652\"  aria-label=\"Toggle\" \/><nav><ul class='ez-toc-list ez-toc-list-level-1' ><li class='ez-toc-page-1'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/convly.ai\/fr\/huawei-ascend-950-pangu-explained-2026\/#The_roadmap_one_generation_a_year\" >The roadmap: one generation a year<\/a><\/li><li class='ez-toc-page-1'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/convly.ai\/fr\/huawei-ascend-950-pangu-explained-2026\/#What_the_Ascend_950_actually_is\" >What the Ascend 950 actually is<\/a><\/li><li class='ez-toc-page-1'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/convly.ai\/fr\/huawei-ascend-950-pangu-explained-2026\/#Scale_as_the_strategy\" >Scale as the strategy<\/a><\/li><li class='ez-toc-page-1'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/convly.ai\/fr\/huawei-ascend-950-pangu-explained-2026\/#openPangu_the_model_side\" >openPangu: the model side<\/a><\/li><li class='ez-toc-page-1'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/convly.ai\/fr\/huawei-ascend-950-pangu-explained-2026\/#The_open-source_play\" >The open-source play<\/a><\/li><li class='ez-toc-page-1'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/convly.ai\/fr\/huawei-ascend-950-pangu-explained-2026\/#The_constraints_Huawei_didnt_dwell_on\" >The constraints Huawei didn&#8217;t dwell on<\/a><\/li><li class='ez-toc-page-1'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/convly.ai\/fr\/huawei-ascend-950-pangu-explained-2026\/#FAQ\" >FAQ<\/a><\/li><li class='ez-toc-page-1'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/convly.ai\/fr\/huawei-ascend-950-pangu-explained-2026\/#Bottom_line\" >R\u00e9sultat<\/a><\/li><li class='ez-toc-page-1'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/convly.ai\/fr\/huawei-ascend-950-pangu-explained-2026\/#Related_articles\" >Articles connexes<\/a><\/li><\/ul><\/nav><\/div>\n<h2><span class=\"ez-toc-section\" id=\"The_roadmap_one_generation_a_year\"><\/span>The roadmap: one generation a year<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Huawei&#8217;s framing is a metronome. Four parts, one per year, each roughly doubling the last:<\/p>\n<ul>\n<li><strong>Ascend 950PR<\/strong> \u2014 Q1 2026, prefill and recommendation<\/li>\n<li><strong>Ascend 950DT<\/strong> \u2014 cloud in August 2026, commercial Q4 2026, decode and training<\/li>\n<li><strong>Ascend 960<\/strong> \u2014 Q4 2027<\/li>\n<li><strong>Ascend 970<\/strong> \u2014 Q4 2028<\/li>\n<\/ul>\n<p>The &#8220;PR&#8221; and &#8220;DT&#8221; suffixes are the interesting part. Rather than ship one general-purpose accelerator, Huawei split inference in half. The 950PR is tuned for the prefill stage \u2014 the compute-heavy pass over your prompt \u2014 and for recommendation systems. The 950DT handles decode (token-by-token generation) and sustained training, which is why it gets the fatter memory. If you have read our <a href=\"\/fr\/npu-vs-gpu-for-ai-2026\/\">NPU vs GPU explainer<\/a>, this is a familiar idea pushed further: specialize the silicon to the phase of the workload.<\/p>\n<p>The headline number \u2014 roughly 4 FP4 zettaflops by 2028 \u2014 is a system-level target for the Atlas 960 SuperCluster, not a single chip. Keep that distinction in mind every time you see a zettaflops figure attached to Huawei; the eye-watering numbers always describe a building full of accelerators, not the accelerator.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"What_the_Ascend_950_actually_is\"><\/span>What the Ascend 950 actually is<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Here are the per-chip specs Huawei has disclosed. These are vendor figures for parts that, as of mid-June 2026, are only partly shipping, so treat them as targets rather than benchmarked results.<\/p>\n<table class=\"convly-vs\">\n<thead>\n<tr>\n<th>Spec<\/th>\n<th>Ascend 950PR<\/th>\n<th>Ascend 950DT<\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>Availability<\/td>\n<td>Q1 2026<\/td>\n<td>Cloud Aug 2026, commercial Q4 2026<\/td>\n<\/tr>\n<tr>\n<td>Role<\/td>\n<td>Prefill \/ recommendation<\/td>\n<td>Decode \/ training<\/td>\n<\/tr>\n<tr>\n<td>FP8 compute<\/td>\n<td>~1 PFLOPS<\/td>\n<td>~1 PFLOPS<\/td>\n<\/tr>\n<tr>\n<td>FP4 compute<\/td>\n<td>~2 PFLOPS<\/td>\n<td>~2 PFLOPS<\/td>\n<\/tr>\n<tr>\n<td>M\u00e9moire<\/td>\n<td>128 GB HiBL 1.0<\/td>\n<td>144 GB HiZQ 2.0<\/td>\n<\/tr>\n<tr>\n<td>Largeur de bande de la m\u00e9moire<\/td>\n<td>~1.6 TB\/s<\/td>\n<td>~4.0 TB\/s<\/td>\n<\/tr>\n<tr>\n<td>Interconnect<\/td>\n<td>2 TB\/s<\/td>\n<td>2 TB\/s<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>The genuinely notable thing here is the memory. HiBL and HiZQ are Huawei&#8217;s own high-bandwidth memory \u2014 homegrown HBM, developed because export controls cut off easy access to the latest stacks from SK Hynix, Micron, and Samsung. A Chinese vendor shipping competitive on-package HBM at all is a real engineering result, and the 950DT&#8217;s 144 GB at 4.0 TB\/s is in the right ballpark for a modern training part. Huawei also says the 950DT&#8217;s 2 TB\/s interconnect is about 2.5x that of its 910C predecessor \u2014 again, a vendor figure.<\/p>\n<p>Now the reality check. NVIDIA&#8217;s Rubin VR200, also due in the second half of 2026, targets roughly 35 PFLOPS of FP4 for training and about 50 PFLOPS of FP4 for inference, with 288 GB of HBM4 at around 22 TB\/s. (Those are NVIDIA&#8217;s own labels \u2014 training versus inference \u2014 not a dense-versus-sparse split.) On raw per-chip FP4, that is a gap of roughly 17x to 25x against a single Ascend 950&#8217;s ~2 PFLOPS, depending on which Rubin figure you use. Huawei&#8217;s own Atlas 350 card, built on the 950PR, claims 1.56 PFLOPS of FP4 and &#8220;2.8x the H20&#8221; \u2014 and even that is a comparison to the cut-down, export-compliant H20, not to a full Blackwell or Rubin, and it remains a vendor claim awaiting independent testing. The fair one-line summary, echoed by analysts who track the silicon, is that a single Ascend 950 reaches rough parity with NVIDIA&#8217;s Hopper generation, not with what NVIDIA is selling in 2026. For context on the NVIDIA side, see our <a href=\"\/fr\/nvidia-vera-rubin-explained-2026\/\">Vera Rubin breakdown<\/a>.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Scale_as_the_strategy\"><\/span>Scale as the strategy<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Huawei knows it cannot win the chip-versus-chip fight, so it is not trying to. The bet is system architecture. The Atlas 950 SuperPoD ties together 8,192 Ascend 950DT accelerators into one logical machine: roughly 8 EFLOPS FP8 and 16 EFLOPS FP4, 1,152 TB of memory, and about 16 PB\/s of interconnect bandwidth across an optical fabric. Stack 64 of those into an Atlas 950 SuperCluster and you get more than 520,000 NPUs delivering about 524 EFLOPS FP8 and roughly 1 FP4 zettaflops. The 2027 Atlas 960 SuperCluster pushes to the million-card level and the 2\/4 zettaflops (FP8\/FP4) figures.<\/p>\n<p>Against NVIDIA&#8217;s NVL144, Huawei claims the 950 SuperPoD packs roughly an order of magnitude more accelerators and about 6.7x the aggregate compute, with far more memory (around 15x) and interconnect bandwidth. That can be simultaneously true and misleading: you are comparing an 8,192-chip pod to a 144-GPU rack. The honest reading is that if you have unlimited floor space, cheap power, and enough chips, you can out-muscle a smaller, more efficient NVIDIA system. Those are three big ifs, and the third one \u2014 enough chips \u2014 is exactly where the story gets hard.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"openPangu_the_model_side\"><\/span>openPangu: the model side<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>A chip platform is only as useful as the software people run on it, and Huawei has been busy on that front too. At its developer conference (HDC) in June 2026, Huawei released <strong>openPangu 2.0<\/strong>: a Pro model with 505B total parameters and 18B active, and a Flash model at 92B total \/ 6B active, both supporting 512K-token context. Huawei says the Pro model roughly doubles single-card throughput versus other leading open-source models on Ascend hardware \u2014 again, a vendor figure on its own silicon, not an independently benchmarked result.<\/p>\n<p>This builds on 2025&#8217;s Pangu Pro MoE 72B, which introduced a Mixture of Grouped Experts (MoGE) design specifically shaped to balance load across Ascend chips. The pattern is deliberate: co-design the model architecture with the hardware so the accelerator&#8217;s weaknesses matter less. It is a different philosophy from the dense-then-sparse approach behind models like <a href=\"\/fr\/deepseek-explained-2026\/\">DeepSeek<\/a>, but it shares the same goal \u2014 squeezing frontier-ish behavior out of constrained compute.<\/p>\n<div class=\"convly-procons\">\n<div class=\"pros\">\n<h4>What&#8217;s working<\/h4>\n<ul>\n<li>Homegrown HBM in volume \u2014 a real supply-chain milestone<\/li>\n<li>A credible, dated roadmap rather than vaporware<\/li>\n<li>Open-sourcing CANN, Mind, and Pangu to pull developers off CUDA<\/li>\n<li>System-scale designs that sidestep the per-chip gap<\/li>\n<\/ul>\n<\/div>\n<div class=\"cons\">\n<h4>What&#8217;s holding it back<\/h4>\n<ul>\n<li>SMIC capped at 7nm; large dies yield poorly<\/li>\n<li>HBM supply is the true ceiling on chips shipped<\/li>\n<li>Per-chip performance trails NVIDIA by roughly 5x on TPP<\/li>\n<li>The 2026 parts regress versus 2025&#8217;s own 910C on TPP<\/li>\n<\/ul>\n<\/div>\n<\/div>\n<h2><span class=\"ez-toc-section\" id=\"The_open-source_play\"><\/span>The open-source play<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>The software push is the part most likely to matter long-term. At Huawei Connect the company committed to opening its full stack by December 31, 2025: the <strong>CANN<\/strong> heterogeneous-compute toolkit (its answer to CUDA), the <strong>Mind<\/strong> series toolchains and development environment, and the <strong>openPangu<\/strong> foundation models. Eric Xu framed it as a long-term project, with Huawei pledging to spend roughly 15 billion yuan (about US$2.1 billion) a year over five years on ecosystem and open computing.<\/p>\n<p>The logic is sound. NVIDIA&#8217;s real moat is not silicon, it is CUDA and the decade of libraries built on top of it. If Huawei wants Ascend to be more than a captive platform for Chinese hyperscalers, it has to make porting painless and give developers source access. Whether that lands is an empirical question you can answer over the coming months by watching the GitHub signals \u2014 active PRs, steady releases, community-maintained kernels. CANN&#8217;s compiler interfaces and virtual instruction set are slated to open (with the rest of CANN fully open-sourced); the proof will be third-party adoption outside Huawei&#8217;s own customers.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"The_constraints_Huawei_didnt_dwell_on\"><\/span>The constraints Huawei didn&#8217;t dwell on<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Here is the uncomfortable core. Every impressive number above runs into the same wall: Huawei cannot make enough of these chips at a competitive process node.<\/p>\n<p>SMIC is stuck at a 7nm-class process because export controls keep EUV lithography out of China, and yields on large AI dies at that node are poor. Worse, <strong>HBM is the bottleneck<\/strong> \u2014 more limiting than die production itself. By SemiAnalysis&#8217;s estimate, Chinese memory maker CXMT can produce only around 2 million HBM stacks next year, enough for roughly 250,000\u2013300,000 Ascend-class chips, even though SMIC could bake die for more than a million. Without stacks, finished accelerators cannot ship, no matter how many compute dies SMIC produces.<\/p>\n<p>The performance math follows from that. Analysts at the Council on Foreign Relations estimate the best U.S. AI chips are currently about five times more powerful than Huawei&#8217;s best on a total-processing-performance basis, widening to roughly seventeen times by the second half of 2027. On aggregate output, the CFR&#8217;s most Huawei-favorable scenario still has Huawei producing only about 5% of NVIDIA&#8217;s total AI compute in 2026, falling toward 2% in 2027 \u2014 and its median estimate is far lower, around 1%. Most telling: the 2026 Ascend 950PR and 950DT actually have <em>lower<\/em> TPP than 2025&#8217;s Ascend 910C \u2014 a sign of how hard domestic production is \u2014 and on Huawei&#8217;s own roadmap the first part to beat an H200 on performance or memory bandwidth is the Ascend 960 in Q4 2027. If you are choosing hardware to run models locally today, our <a href=\"\/fr\/best-gpus-for-local-llms-2026\/\">best GPUs for local LLMs guide<\/a> is a more practical starting point than anything in this roadmap.<\/p>\n<p>None of this means the effort is theater. NVIDIA&#8217;s Jensen Huang has repeatedly called Huawei &#8220;formidable&#8221; \u2014 in May 2026 he said NVIDIA has &#8220;largely conceded&#8221; China&#8217;s advanced AI chip market to it. The competition is real; what the manufacturing math shows is that the timeline is the thing to watch, and timelines on constrained nodes slip.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"FAQ\"><\/span>FAQ<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<h3>Is the Huawei Ascend 950 better than NVIDIA&#8217;s Blackwell or Rubin?<\/h3>\n<p>No, not per chip. A single Ascend 950 lands around Hopper-class performance \u2014 roughly 1 PFLOPS FP8 and 2 PFLOPS FP4 \u2014 while NVIDIA&#8217;s Rubin VR200 targets about 35 PFLOPS of FP4 for training and 50 PFLOPS for inference. Huawei&#8217;s argument is at the system level: wire thousands of chips together and beat a smaller NVIDIA rack on aggregate.<\/p>\n<h3>When does the Ascend 950DT actually ship?<\/h3>\n<p>It reaches Huawei Cloud in August 2026 as a cloud-accessible service, with a full commercial launch (cards and SuperPoD servers) slated for Q4 2026. The 950PR began shipping earlier, in Q1 2026.<\/p>\n<h3>What is openPangu and how is it different from Pangu Pro MoE 72B?<\/h3>\n<p>openPangu 2.0, released at HDC 2026, is the latest open-source family: a 505B-parameter Pro model (18B active) and a 92B Flash model (6B active), both with 512K context. The 2025 Pangu Pro MoE 72B was the earlier model that introduced the Mixture of Grouped Experts architecture tuned for Ascend.<\/p>\n<h3>Can Huawei make enough Ascend chips to matter?<\/h3>\n<p>That is the real limit. By SemiAnalysis&#8217;s estimate, HBM supply caps output at roughly 250,000\u2013300,000 Ascend-class chips a year, and SMIC&#8217;s 7nm yields are weak. Even the most Huawei-favorable CFR scenario has it fielding only about 5% of NVIDIA&#8217;s aggregate AI compute in 2026, with the median estimate closer to 1%.<\/p>\n<h3>What are HiBL and HiZQ memory?<\/h3>\n<p>They are Huawei&#8217;s homegrown high-bandwidth memory, developed because export controls restrict access to the latest third-party HBM. The 950PR uses 128 GB of HiBL 1.0 (~1.6 TB\/s); the 950DT uses 144 GB of HiZQ 2.0 (~4.0 TB\/s).<\/p>\n<h3>Why is Huawei open-sourcing CANN and the Pangu models?<\/h3>\n<p>To break NVIDIA&#8217;s software lock-in. CUDA is NVIDIA&#8217;s real moat, so Huawei is opening CANN (its CUDA equivalent), the Mind toolchain, and the Pangu models to lower the cost of porting and build a developer ecosystem around Ascend.<\/p>\n<h3>What does &#8220;4 zettaflops by 2028&#8221; actually refer to?<\/h3>\n<p>It is a system-level target for the Atlas 960 SuperCluster \u2014 a million-card cluster \u2014 at FP4 precision, not a single chip. Individual Ascend accelerators are measured in petaflops, three orders of magnitude lower.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Bottom_line\"><\/span>R\u00e9sultat<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Huawei&#8217;s 2026 announcements are serious and constrained in equal measure. The roadmap is real, the homegrown HBM is a genuine milestone, the openPangu models and the CANN open-sourcing are smart moves to chip away at NVIDIA&#8217;s software moat, and the SuperPoD scale-out is a clever way to route around weak silicon. Take all of that at face value.<\/p>\n<p>Then read the fine print. Per chip, the Ascend 950 is a Hopper-era part arriving in a Rubin-era year, and even Huawei&#8217;s own roadmap shows the 2026 chips regressing on total performance versus 2025&#8217;s 910C. The binding constraint is not ambition or design talent \u2014 it is a 7nm ceiling and an HBM supply that can feed only a few hundred thousand chips a year. For Chinese buyers cut off from NVIDIA, Ascend is the best option on the board and getting better; NVIDIA&#8217;s own CEO calls Huawei &#8220;formidable&#8221; and admits the company has largely conceded that market. For everyone watching the global race, the honest verdict is that Huawei has arrived as a real competitor, but the chips, the yields, and the calendar all still favor NVIDIA \u2014 and will into 2027 unless the manufacturing story changes.<\/p>\n<p><!--related-block--><\/p>\n<div class=\"convly-related\">\n<h2><span class=\"ez-toc-section\" id=\"Related_articles\"><\/span>Articles connexes<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<ul>\n<li><a href=\"https:\/\/convly.ai\/fr\/npu-vs-gpu-for-ai-2026\/\">NPU vs GPU for AI: What&#039;s the Difference? (2026)<\/a><\/li>\n<li><a href=\"https:\/\/convly.ai\/fr\/china-ai-strategy\/\">China&#039;s AI in 2026: The Models, Labs, and Open-Source Strategy<\/a><\/li>\n<li><a href=\"https:\/\/convly.ai\/fr\/kimi-k2-7-code-explained-2026\/\">Explication du code Kimi K2.7 : le mod\u00e8le de codage ouvert 1T de Moonshot<\/a><\/li>\n<\/ul>\n<\/div>","protected":false},"excerpt":{"rendered":"<p>Huawei has turned its AI silicon plans into a dated, one-chip-a-year roadmap, opened the openPangu 2.0 models, and committed to open-sourcing CANN. We weigh all of it against the constraints the keynote skipped: a 7nm ceiling at SMIC, a homegrown HBM supply that can feed only a few hundred thousand chips, and a per-chip gap to NVIDIA that Huawei&#8217;s own roadmap admits.<\/p>","protected":false},"author":1,"featured_media":1183,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"site-sidebar-layout":"default","site-content-layout":"","ast-site-content-layout":"default","site-content-style":"default","site-sidebar-style":"default","ast-global-header-display":"","ast-banner-title-visibility":"","ast-main-header-display":"","ast-hfb-above-header-display":"","ast-hfb-below-header-display":"","ast-hfb-mobile-header-display":"","site-post-title":"","ast-breadcrumbs-content":"","ast-featured-img":"","footer-sml-layout":"","ast-disable-related-posts":"","theme-transparent-header-meta":"","adv-header-id-meta":"","stick-header-meta":"","header-above-stick-meta":"","header-main-stick-meta":"","header-below-stick-meta":"","astra-migrate-meta-layouts":"default","ast-page-background-enabled":"default","ast-page-background-meta":{"desktop":{"background-color":"var(--ast-global-color-5)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}},"ast-content-background-meta":{"desktop":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}},"footnotes":""},"categories":[245],"tags":[757,776,420,780,775,778,777,779],"class_list":["post-1178","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-ai-chips","tag-ai-chips","tag-ascend-950","tag-china-ai","tag-hbm","tag-huawei","tag-nvidia","tag-pangu","tag-smic"],"_links":{"self":[{"href":"https:\/\/convly.ai\/fr\/wp-json\/wp\/v2\/posts\/1178","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/convly.ai\/fr\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/convly.ai\/fr\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/convly.ai\/fr\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/convly.ai\/fr\/wp-json\/wp\/v2\/comments?post=1178"}],"version-history":[{"count":1,"href":"https:\/\/convly.ai\/fr\/wp-json\/wp\/v2\/posts\/1178\/revisions"}],"predecessor-version":[{"id":1186,"href":"https:\/\/convly.ai\/fr\/wp-json\/wp\/v2\/posts\/1178\/revisions\/1186"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/convly.ai\/fr\/wp-json\/wp\/v2\/media\/1183"}],"wp:attachment":[{"href":"https:\/\/convly.ai\/fr\/wp-json\/wp\/v2\/media?parent=1178"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/convly.ai\/fr\/wp-json\/wp\/v2\/categories?post=1178"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/convly.ai\/fr\/wp-json\/wp\/v2\/tags?post=1178"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}